Principal Engineer Analog Design

Bolt Talent Solutions

We are on the hunt for a Principal Analog Design Engineer for our client in the semi conductor industry headquartered in California.

The Principal Analog Design Engineer occasionally reports into an office in either Irvine, CA, or Andover, MA. 
 
Are an experienced at top-level die development, tape-out, and product ownership?
Do you have a strong knowledge of design flow and ESD best practices? If you are also looking for a challenging and exciting career supporting the technological revolution in wireless networking, then look no further.
Our client’s work culture values diversity, social responsibility, open communication, mutual trust, and respect.  We are excited about the opportunity to connect you with a team of talented individuals who together can change the way the world communicates.  

What will you be doing?
You will be responsible for the analysis, design, and development of analog integrated circuits used in next-generation mobile devices using BiCMOS, SOI, and CMOS technologies.  Typical circuitry to be developed will include BJT and MOS biasing blocks, linear and logarithmic RF detectors, over-voltage/over-current protection circuits, regulators,  and a range of closed-loop feedback circuits.  You will be interacting with designers from multiple sites with occasional travel.
 
What skills and experience do you need to bring to the table?
  • Requires a Bachelor's degree with 12-years minimum experience with a demonstrated track record of product ownership/delivery
  • Comprehensive simulation skills in Cadence including PEX, Monte Carlo, and Corner analysis as well as basic skills in system-level analysis are required
  • Strong experience in standard analog cell design including bandgaps, op-amps, detectors,  regulators, precision current sources, and basic logic synthesis
  • On the job exposure to best following best practices
    • Analog layout practices in Cadence Virtuoso
    • Design flow and ESD best practices
    • Commercial CMOS wafer fab technologies, 180nm or below
    • 802.11 WiFi, 5G, and mmWave product requirements
  • Ideal if you have a combination of the following skills/experience/exposure:
    • Top-level die development
    • Tape-out development
    • SOI technology & design
    • Bipolar technology & design
  • The following skills and experience are a plus:
    • RF circuits including amplifiers and switches
    • Mixed-signal and digital integration
    • III-V device and applications
Equal Employment Opportunity
Bolt Talent Solutions provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, gender, sexual orientation, national origin, age, disability, marital status, amnesty, or status as a covered veteran in accordance with applicable federal, state and local laws. Bolt Talent Solutions complies with applicable state and local laws governing nondiscrimination in employment in every location in which the company has facilities.